A 1-V 9.6-GHz charge-pump PLL with low RMS-integrated jitter

Author:

Qiu DingORCID,Kong Xiangjian,Jian Mingchao,Zheng Jiwei,Guo Chunbing

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference17 articles.

1. "A fully integrated low-power high-coexistence 2.4-GHz ZigBee transceiver for biomedical and healthcare applications,";Gil;IEEE Trans. Microw. Theor. Tech.,2014

2. "A 0.65-V 12–16-GHz sub-sampling PLL with 56.4-fsrms integrated jitter and −256.4-dB FoM,";Zhang;IEEE J. Solid State Circ.,2020

3. A low noise sub-sampling PLL in which divider noise is eliminated and PD/CP noise is not multiplied by N2;Gao;IEEE J. Solid State Circ.,2009

4. A 14-GHz bang-bang digital PLL with sub-150-fs integrated jitter for wireline applications in 7-nm FinFET CMOS;Pfaff;IEEE J. Solid State Circ.,2020

5. An 18–23 GHz 57.4-fs RMS jitter −253.5-dB FoM sub-harmonically injection-locked all-digital PLL with single-ended injection technique and ILFD aided adaptive injection timing alignment technique;Zhang;IEEE Trans. Circ. Syst. I: Regular Papers,2019

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