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A single clock cycle approximate adder with hybrid prediction and error compensation methods

  • Published:2019-05 Issue: Volume:87 Page:45-50
  • ISSN:0026-2692
  • Container-title:Microelectronics Journal
  • language:en
  • Short-container-title:Microelectronics Journal

Author:

Luo Li,Chen Zhe,Yang Xinghua,Qiao Fei,Wei Qi,Yang Huazhong

Publisher

Elsevier BV

Subject

General Engineering

Reference33 articles.

1. Approximate computing: an emerging paradigm for energy-efficient design;Han,2013

2. Memristor-based approximated computation;Li,2013

3. A Review, Classification and Comparative Evaluation of Approximate Arithmetic Circuits;Gupta,2017

4. A curve fitting approach for non-iterative divider design with accuracy and performance trade-off;Wu,2015

5. Design of approximate radix-4 booth multipliers for error-tolerant computing;Liu;IEEE Trans. Comput.,2017

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Design of a 4-Bit 4-Operand Adder Using Verilog: An Abstraction Analysis;2024 IEEE International Students' Conference on Electrical, Electronics and Computer Science (SCEECS);2024-02-24

2. Performance Evaluation of Approximate Adders: Case Study;International Journal of Engineering and Advanced Technology;2022-10-30

3. Non-iterative division circuit design with accuracy and performance trade-off based on mixed integer linear programming approach;Microelectronics Journal;2022-09

4. Fixed point multi-bit approximate adder based convolutional neural network accelerator for digit classification inference;Journal of Intelligent & Fuzzy Systems;2020-12-04

5. Approximate radix-8 Booth multiplier for low power and high speed applications;Microelectronics Journal;2020-07
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