Investigation and optimization of electrical and thermal performance for 5-nm GAA vertically stacked nanowire FETs-Reference-Cited by-同舟云学术

Investigation and optimization of electrical and thermal performance for 5-nm GAA vertically stacked nanowire FETs

Published:2020-01 Issue: Volume:95 Page:104679
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Huang Ning,Liu Weijing,Li Qinghua,Bai Wei,Tang Xiadong,Yang Ting

Funder

National Natural Science Foundation of China

Publisher

Elsevier BV

Subject

General Engineering

Reference33 articles.

1. Challenges on surface conditioning in 3D device architectures: triple-gate FinFETs, gate-all-around lateral and vertical nanowire FETs;Vasile Paraschiv;J. ECS Trans.,2017

2. Toward more realistic NEGF simulations of vertically stacked multiple SiNW FETs;Park,2018

3. Total ionizing dose response of multiple-gate nanowire field effect transistors;Gaillardin;J. IEEE Trans. Nuclear Sci.,2017

4. Efficient fluorescence quenching of CdSe quantum dots on epitaxial GaAs nanostructures;Lohani;J.Nanoparticle Res.,2019

5. Hybrid Nanocomposites: Fundamentals, Synthesis, and Applications;Pal,2019

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