Author:
Panem Charanarur,Gad Rajendra S.,Kaushik Brajesh Kumar
Reference99 articles.
1. Elevator-first: A deadlock-free distributed routing algorithm for vertically partially connected 3D-NoCs;Dubois;IEEE Trans. Comput.,2013
2. Design and management of high-performance, reliable and thermal-aware 3D networks-on-chip;Rahmani;IET Circ. Devices Syst.,2012
3. Thermal-constrained task allocation for interconnect energy reduction in 3-D homogeneous MPSoCs;Cheng;:IEEE Trans. Very Large Scale Integr. (VLSI) Syst.,2013
4. V. Pasca, L. Anghel, C. Rusu, M. Benabdenbi, Configurable serial fault-tolerant link for communication in 3D integrated systems, in: 2010 IEEE 16th International on-Line Testing Symposium, 2010, pp. 115–120, 10.1109/IOLTS.2010.5560225.
5. J. Joyner, P. Zarkesh-Ha, J. Meindl, A stochastic global net-length distribution for a three-dimensional system-on-a-chip (3D-SoC), in: Proceedings 14th Annual IEEE International ASIC/SOC Conference (IEEE Cat. No.01TH8558), 2001, pp. 147–151, 10.1109/ASIC.2001.954688.
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