Author:
Kumar Ajay,Gupta Neha,Chaujar Rishu
Reference34 articles.
1. 0.15-m RF CMOS technology compatible with logic CMOS for low-voltage operation;Saito;IEEE Trans. Electron,1998
2. Silicon technology tradeoffs for radio-frequency/mixed-signal system-on-a-chip;Larson;IEEE Trans. Electron.,2003
3. Influence of device engineering on the analog and RF performances of SOI MOSFETs;Kilchytska;IEEE Trans. Electron.,2003
4. 0.1pm RFCMOS on high resistivity. Substrate for system on chip (SOC) applications;Yang;IEDM Technol.,2002
5. Modeling the effect of source/drain junction depth on bulk-MOSFET scaling;Murali;Solid-State Electron.,2004
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