Complexity reduction in multilevel speculative DFEs with unconstrained receiver response

Author:

Abouzeid Mohamed O.,Musah TawfiqORCID

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference22 articles.

1. A 1.41-pJ/b 224-Gb/s PAM4 6-bit ADC-based SerDes receiver with hybrid AFE capable of supporting long reach channels;Khairi;IEEE J. Solid State Circ.,2023

2. Toward 224-Gb/s electrical signaling—modulation, equalization, and channel options;Hossain;IEEE Trans. Compon. Packag. Manuf. Technol.,2021

3. 6.1 A 112Gb/s PAM-4 long-reach wireline transceiver using a 36-way time-interleaved SAR-ADC and inverter-based rx analog front-end in 7nm FinFET;Jay,2020

4. A 4.9pJ/b 16-to-64Gb/s PAM-4 VSR transceiver in 28nm FDSOI CMOS;Depaoli,2018

5. Adaptive equalization and data recovery in a dual-mode (PAM2/4) serial link transceiver;Stojanovic,2004

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