Excess power elimination in high-resolution dynamic comparators

Author:

Khorami Ata,Sharifkhani Mohammad

Publisher

Elsevier BV

Subject

General Engineering

Reference24 articles.

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2. Behzad Razavi, and 罗扎. Design of analog CMOS integrated circuits. 清华大学出版社有限公司, 2001.

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4. Yield and speed optimization of a latch-type voltage sense amplifier;Wicht;IEEE J. Solid-State Circuits,2004

5. Kickback noise reduction techniques for CMOS latched comparators;Figueiredo;Circuits Syst. II: Express Briefs, IEEE Trans.,2006

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