1. Optimization of cryogenic cmos processes for sub-10k applications;Glidden;Proceedings of the SPIE,1992
2. Physics of Semiconductor Devices;Sze,1981
3. Q. Liu, Josephson-CMOS hybrid memories, Ph.D. Thesis, EECS Department, University of California, Berkeley, 2007.
4. Flicker noise in CMOS transistors from subthreshold to strong inversion at various temperatures;Change;IEEE Transactions on Electron Devices,1994
5. C. Claeys, E. Simoen, Is there a future for cryogenic SOI? in: Proceedings of the 9th International Symposium on Silicon-on-Insulator Technology and Devices, Seattle, WA, USA, pp. 36–50.