The novel SCR-based ESD protection with low triggering and high holding voltages

Author:

Kang Myounggon,Song Ki-Whan,Park Byung-Gook,Shin Hyungcheol

Publisher

Elsevier BV

Subject

General Engineering

Reference7 articles.

1. A 512-mb DDR3 SDRAM prototype with C/sub IO/minimization and self-calibration techniques.;Park;2006 IEEE J. Solid-State Circuits,2006

2. Myounggon Kang, Ki-Whan Song, Hoeju Chung, Jinyoung Kim, Yeong-Taek Lee, Changhyun Kim, SCR-based ESD protection for high bandwidth DRAMs, in: Proceedings of the Asian Solid-State Circuits Conference (ASSCC), 2007, pp. 208–211, 12–14.

3. Ming-Dou Ker, Kuo-Chun Hsu, Complementary substrate-triggered SCR devices for on-chip ESD protection circuits, in: Proceedings of the ASIC/SOC, pp. 229–233, 2002.

4. Design of a latchup-free ESD power clamp for smart power ICs;Park;J. Semicond. Technol. Sci. (JSTS),2008

5. BER measurement of a 5.8-Gb/s/pin unidirectional differential I/O for DRAM application with DIMM channel;Jang;IEEE J. Solid-State Circuits,2009

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