Modeling of electrostatics and drain current in nanoscale quadruple-gate MOSFET using conformal mapping techniques

Author:

Monga Udit,Nilsen Dag-Martin,Fjeldly Tor A.

Publisher

Elsevier BV

Subject

General Engineering

Reference10 articles.

1. FinFET scaling to 10nm gate length;Yu;IEDM Tech. Dig.,2002

2. FinFETs and Other Multi-Gate Transistors;Colinge,2008

3. Precise modeling framework for short channel double-gate and gate-all-around MOSFETs;Børli;IEEE Trans. Electron Devices,2008

4. H. Børli, Modeling of Drain Current and Intrinsic Capacitances in Nanoscale Double-Gate and Gate-All-Around MOSFETs, Ph.D. Thesis, Norwegian University of Science and Technology, 2008.

5. Scaling theory for double-gate SOI MOSFETs;Suzuki;IEEE Trans. Electron Devices,1993

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Nanoscale T-shaped Double Gate DG MOSFET: Numerical Investigation for Analog/RF and Digital Performance;Superlattices and Microstructures;2016-01

2. Threshold voltage modeling for dual-metal quadruple-gate (DMQG) MOSFETs;International Journal of Numerical Modelling: Electronic Networks, Devices and Fields;2015-11-25

3. Quasi-3D subthreshold current and subthreshold swing models of dual-metal quadruple-gate (DMQG) MOSFETs;Journal of Computational Electronics;2015-04-02

4. Conclusions and Future Scope;Analog Circuits and Signal Processing;2013-08-14

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