1. A design flow for application-specific networks on chip with guaranteed performance to accelerate SOC design and verification;Goossens,2005
2. A gracefully degrading and energy-efficient modular router architecture for on-chip networks;Kim,2006
3. Xpipes: a network-on-chip architecture for gigascale system on chip;Bertozzi;IEEE Circuits Syst.,2004
4. A reliability-aware multi-application mapping technique in networks-on-chip;Khalili,2013
5. Bandwidth- constrained mapping of cores onto NoC architectures;Murali,2004