Pass transistor with dual threshold voltage domino logic design using standby switch for reduced subthreshold leakage current-Reference-Cited by-同舟云学术

Pass transistor with dual threshold voltage domino logic design using standby switch for reduced subthreshold leakage current

Published:2013-12 Issue:12 Volume:44 Page:1099-1106
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Yuan Shoucai,Li Yuan,Yuan Yifang,Liu Yamei

Publisher

Elsevier BV

Subject

General Engineering

Reference34 articles.

1. Design and implementation of high speed ALU using optimized PDP adder and multiplier;Kathirvelu;J. Appl. Sci. Res.,2012

2. Design of optimal reversible carry look-ahead adder with optimal garbage and quantum cost;Jamal;Int. J. Eng. Technol.,2012

3. Study of performance of adiabatic carry look-ahead adder using dynamic CMOS logic;Tripathi;Int. J. Electr. Electron. Eng. (IJEEE),2011

4. Implementation of high speed low power carry look-ahead adder using domino logic;Halder;Int. J. Appl. Sci. Eng. Res.,2012

5. P.H.S.T. Murthy, K. Chaitanya, Malleswara Rao. V., FTL based carry look-ahead adder design using floating gates, 2011 in: International Conference on Circuits, System and Simulation, IPCSIT, IACSIT Press, Singapore, 7 2011, pp. 149–153.

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