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Analyzing and optimizing the performance and energy efficiency of transactional scientific applications on large-scale NUMA systems with HTM support

  • Published:2019-05 Issue: Volume:127 Page:1-17
  • ISSN:0743-7315
  • Container-title:Journal of Parallel and Distributed Computing
  • language:en
  • Short-container-title:Journal of Parallel and Distributed Computing

Author:

Park Jinsu,Baek Woongki

Funder

National Research Foundation of Korea

Institute for Information & Communications Technology Promotion (IITP), Republic of Korea

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Theoretical Computer Science,Software

Reference37 articles.

1. Intel performance counter monitor, https://software.intel.com/en-us/articles/intel-performance-counter-monitor.

2. perf: Linux profiling with performance counters, https://perf.wiki.kernel.org/index.php/Main_Page, https://perf.wiki.kernel.org/.

3. Programming with hardware lock elision;Afek,2013

4. The performance of spin lock alternatives for shared-memory multiprocessors;Anderson;IEEE Trans. Parallel Distrib. Syst.,1990

5. Making nested parallel transactions practical using lightweight hardware support;Baek,2010

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1. Deep Learning-Based Detection for Multiple Cache Side-Channel Attacks;IEEE Transactions on Information Forensics and Security;2024

2. DPrime+DAbort: A High-Precision and Timer-Free Directory-Based Side-Channel Attack in Non-Inclusive Cache Hierarchies using Intel TSX;2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2022-04

3. Time–energy trade-offs in processing divisible loads on heterogeneous hierarchical memory systems;Journal of Parallel and Distributed Computing;2020-10

4. Special issue: Selected papers from IPDPS’18;Journal of Parallel and Distributed Computing;2019-11

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