A leakage-aware L2 cache management technique for producer–consumer sharing in low-power chip multiprocessors
Author:
Publisher
Elsevier BV
Subject
Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Theoretical Computer Science,Software
Reference28 articles.
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Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A Spatial and Temporal Locality-Aware Adaptive Cache Design With Network Optimization for Tiled Many-Core Architectures;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2017-09
2. A survey of architectural techniques for improving cache power efficiency;Sustainable Computing: Informatics and Systems;2014-03
3. Exploiting Replicated Cache Blocks to Reduce L2 Cache Leakage in CMPs;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2013-10
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