Funder
National Natural Science Foundation of China
Subject
Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Theoretical Computer Science,Software
Reference36 articles.
1. J. Antusiak, A. Trouv, A Comparison of DAG and mesh topologies for coarse-grain reconfigurable array, in: Proc. of 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops and PhD Forum (IPDPSW 2012), 2012, pp. 220-226.
2. A comprehensive reconfiguration scheme for fault-tolerant VLSI/WSI array processors;Chen;IEEE Trans. Comput.,1997
3. An efficient reconfiguration scheme for fault-tolerant meshes;Chuang;Inform. Sci.,2005
4. M. Fukushi, Y. Fukushima, A genetic approach for the reconfiguration of degradable processor arrays, in: Proc. IEEE 20th Int’l Symp. Defect and Fault Tolerance in VLSI Systems, Oct. 2005, pp. 63-71.
5. A self-reconfigurable hardware architecture for mesh arrays using single/double vertical track switches;Fukushi;IEEE Trans. Instrum. Meas.,2004
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