Speculative inter-thread store-to-load forwarding in SMT architectures-Reference-Cited by-同舟云学术

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Speculative inter-thread store-to-load forwarding in SMT architectures

Published:2023-03 Issue: Volume:173 Page:94-106
ISSN:0743-7315
Container-title:Journal of Parallel and Distributed Computing
language:en
Short-container-title:Journal of Parallel and Distributed Computing

Author:

Feliu Josué^ORCID,Ros Alberto^ORCID,Acacio Manuel E.,Kaxiras Stefanos

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Theoretical Computer Science,Software

Reference39 articles.

1. GARNET: a detailed on-chip network model inside a full-system simulator;Agarwal,2009

2. K.J. Alexander, C.J. Jonathan, T. Hsieh, M. Recktenwald, Load and store ordering for a strongly ordered simultaneous multithreading core, Oct. 2014, U.S. Patent US14511408.

3. Microprocessor Architecture: From Simple Pipelines to Chip Multiprocessors;Baer,2009

4. A communication characterisation of Splash-2 and Parsec;Barrow-Williams,2009

5. Benchmarking modern multiprocessors;Bienia,2011

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1. Edge Intelligence-Assisted Asymmetrical Network Control and Video Decoding in the Industrial IoT with Speculative Parallelization;Symmetry;2023-08-01

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