Low latency high throughout circular asynchronous FIFO

Author:

Xiao Yong,Zhou Runde

Publisher

Tsinghua University Press

Subject

Multidisciplinary

Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. OWI Controller with FIFO Buffer Function Based on AHB-Lite Bus;2023 IEEE 17th International Conference on Anti-counterfeiting, Security, and Identification (ASID);2023-12-01

2. An enhanced reconfigurable dual-clock FIFO for inter-IP data transmission;IEICE Electronics Express;2023-10-25

3. Bit-Width Conversion Based on Asynchronous FIFO;Highlights in Science, Engineering and Technology;2023-03-16

4. Design of Asynchronous Circular FIFO Buffer for Asynchronous Network on Chips;2022 International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics ( DISCOVER);2022-10-14

5. FPGA Implementation of Asynchronous FIFO;Proceedings of International Conference on Industrial Instrumentation and Control;2022

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