An area optimization approach taking into account polarity conversion sequence
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Published:2023-08
Issue:
Volume:143
Page:110414
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ISSN:1568-4946
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Container-title:Applied Soft Computing
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language:en
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Short-container-title:Applied Soft Computing
Author:
Zhou Yuhao,
He ZhenxueORCID,
Chen Chen,
Xiao Limin,
Wang Xiang
Reference39 articles.
1. S.-Y. Park, et al., A Miniaturized 256-Channel Neural Recording Interface with Area-Efficient Hybrid Integration of Flexible Probes and CMOS Integrated Circuits, IEEE Trans. Bio-Med. Eng. http://dx.doi.org/10.1109/TBME.2021.3093542, early access.
2. Area and power optimization approach for mixed polarity Reed–Muller logic circuits based on multi-strategy bacterial foraging algorithm;Zhou;Appl. Soft Comput,2022
3. Y. Peng, et al., A Low-Area and Low-Power Comma Detection and Word Alignment Circuits for JESD204B/C Controller, IEEE Trans. Circuits Syst. I, Reg. Pap. http://dx.doi.org/10.1109/TCSI.2021.3072772, early access.
4. J. Belot, A. Cherkaoui, R. Laurent, L. Fesquet, An Area and Power Efficient Stochastic Number Generator for Bayesian Sensor Fusion Circuits, IEEE Des. Test http://dx.doi.org/10.1109/MDAT.2021.3050694, early access.
5. An efficient power optimization approach for fixed polarity Reed–Muller logic circuits based on metaheuristic optimization algorithm;Zhou;IEEE Trans. Comput. Aid D,2022