1. Multi-level approximate logic synthesis under general error constraints;Miao,2014
2. Designing energy-efficient approximate adders using parallel genetic algorithms;Naseer,2015
3. A low-power, high-performance approximate multiplier with configurable partial error recovery;Liu,2014
4. Low power, high speed error tolerant multiplier using approximate adders;Reddy,2015
5. Power- and area-efficient approximate Wallace tree multiplier for error-resilient systems;Bhardwaj,2014