Design of an ultra high speed AES processor for next generation IT security-Reference-Cited by-同舟云学术

Design of an ultra high speed AES processor for next generation IT security

Published:2011-11 Issue:6 Volume:37 Page:1160-1170
ISSN:0045-7906
Container-title:Computers & Electrical Engineering
language:en
Short-container-title:Computers & Electrical Engineering

Author:

Ali Liakot,Aris Ishak,Hossain Fakir Sharif,Roy Niranjan

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,General Computer Science,Control and Systems Engineering

Reference35 articles.

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2. Federal Information Processing Standards Publication (FIPS PUB) 197, National Institute of Standards and Technology (NIST). Advanced encryption standard (AES). Available: ; 2001.

3. Leopld G. U.S. unveils advanced encryption standard. EE Times. Available: ; 2001.

4. Gielata A, Russek P, Wiatr K. AES hardware implementation in FPGA for algorithm acceleration purpose. In: Proceedings of International Conference on Signals and Electronic Systems; 2008. p. 137–40.

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