An efficient network on-chip architecture based on isolating local and non-local communications

Author:

Akhlaghi Vahideh,Kamal Mehdi,Afzali-Kusha Ali,Pedram Massoud

Funder

Iran National Science Foundation

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,General Computer Science,Control and Systems Engineering

Reference27 articles.

1. Taylor MB, Kim J, Miller J, Wentzlaff D, Ghodrat F, Greenwald B, et al. A 16-issue multiple-program counter microprocessor with point-to-point scalar operand network. In: Proceedings of international solid-state circuits conference, vol. 1. 2003. p. 170–71.

2. Bocchi M, De Dominicis M, Mucci C, Deledda A, Campi F, Lodi A, et al. Design and implementation of a reconfigurable heterogeneous multiprocessor SoC. In: Proceedings of custom integrated circuits conference; 2006. p. 93–6.

3. The chip is the network: toward a science of network-on-chip design;Marculescu;Found Trends Electron Des Autom,2009

4. Networks on chip: a new SoC paradigm;Benini;IEEE J Comput,2002

5. Carvalho E, Calazans N, Moraes F. Heuristics for dynamic task mapping in NoC-based heterogeneous MPSoCs. In: Proceedings of international workshop on rapid system prototyping; 2006. p. 34–40.

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