Partial bitstream protection for low-cost FPGAs with physical unclonable function, obfuscation, and dynamic partial self reconfiguration

Author:

Gören Sezer,Ozkurt Ozgur,Yildiz Abdullah,Ugurdag H. Fatih,Chakraborty Rajat S.,Mukhopadhyay Debdeep

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,General Computer Science,Control and Systems Engineering

Reference25 articles.

1. Note J-B, Rannaud E. From the bitstream to the netlist. In: Proc. int. symp. on field programmable gate arrays, 2008. p. 264.

2. Moradi A, Barenghi A, Kasper T, Paar C. On the vulnerability of FPGA bitstream encryption against power analysis attacks: extracting keys from Xilinx Virtex-II FPGAs. In: Proc. ACM conference on computer and communications, security, 2011. p. 111–23.

3. Hardware metering: a survey, introduction to hardware security and trust;Koushanfar,2011

4. Xilinx Inc., Device DNA security. .

5. Compton K. Reconfiguration management, reconfigurable computing: the theory and practice of FPGA-based computing. Morgan Kaufmann; 2008. [chapter 4].

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