Author:
Liu Feiyang,Gu Huaxi,Yang Yintang
Subject
Electrical and Electronic Engineering,General Computer Science,Control and Systems Engineering
Reference32 articles.
1. Cost-effective power-aware core testing in NoCs based on a new unicast-based multicast scheme;Xiang;IEEE Trans Comput Aid Design,2011
2. A novel test application scheme for high transition fault coverage and low test cost;Chen;IEEE Trans Comput Aid Design,2010
3. Temperature-aware microarchitecture: modeling and implementation;Skadron;ACM Trans Archit Code Optim,2004
4. William James Dally, Brian Towles. Route packets, not wires: on-chip interconnection networks. In: DAC ‘01: Proceedings of the 38th annual design automation conference, 2001. p. 684–89.
5. Network on Chip: a new SoC paradigm;Benini;Computer,2002
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