Resource Utilization Optimization with Design Alternatives in FPGA based Arithmetic Logic Unit Architectures

Author:

Nangia Rakhi,Shukla Neeraj Kr.

Publisher

Elsevier BV

Subject

General Engineering

Reference14 articles.

1. Stefan Hadjis, et al, “Impact of FPGA Architecture on Resource Sharing in High-Level Synthesis,” FPGA ‘12 Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays, Monterey, California, USA, pp 111-114, 2012.

2. Hardware Resource Utilization Optimization in FPGA based Heterogeneous MPSoC Architectures;Dammak,2015

3. A Review of FPGA-based design methodologies for efficient hardware Area estimation;R.Singh;IOSR Journal of Computer Engineering,2013

4. Efficient Resource Sharing Architecture for Multistandard Communication System;Suresh,2011

5. A DESIGN OF LOW POWER 16-B ALU;Ryu,1999

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