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Performance Improvement of Stencil Computations for Multi-core Architectures based on Machine Learning

  • Published:2017 Issue: Volume:108 Page:305-314
  • ISSN:1877-0509
  • Container-title:Procedia Computer Science
  • language:en
  • Short-container-title:Procedia Computer Science

Author:

Martínez Víctor,Dupros Fabrice,Castro Márcio,Navaux Philippe

Publisher

Elsevier BV

Subject

General Engineering

Reference19 articles.

1. Automatic I/O scheduling algorithm selection for parallel file systems;Boito;Concurrency and Computation: Practice and Experience,2016

2. Adaptive thread mapping strategies for transactional memory applications;Castro;Journal of Parallel and Distributed Computing,2014

3. Automatic code generation and tuning for stencil kernels on modern shared memory architectures;Christen;Comput. Sci.,2011

4. Support-vector networks;Cortes;Machine Learning,1995

5. Optimization and performance modeling of stencil computations on modern microprocessors;Datta;SIAM Rev.,2009

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1. Adaptive Auto-Tuning Framework for Global Exploration of Stencil Optimization on GPUs;IEEE Transactions on Parallel and Distributed Systems;2024-01

2. Application of multi-core learning feature fusion and edge computing in music quality education;International Journal of System Assurance Engineering and Management;2023-10-05

3. Evaluating Data Redistribution in PaRSEC;IEEE Transactions on Parallel and Distributed Systems;2022-08-01

4. StencilMART: Predicting Optimization Selection for Stencil Computations across GPUs;2022 IEEE International Parallel and Distributed Processing Symposium (IPDPS);2022-05

5. Automated performance analysis tools framework for HPC programs;Procedia Computer Science;2022
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