The impact of MOSFET technology evolution and scaling on electrostatic discharge protection

Author:

Voldman Steven H

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference101 articles.

1. Dennard RH, Gaensslean FH, Yu H, Rideout VL, Bassons E, LeBlanc AR. Design of ion-implanted MOSFETs with very small physical dimensions. IEEE J Solid St Circuits 1974;SC-9:256.

2. Vittoz EA. Low power design: ways to approach the limits. In: ISSCC Technical Papers, 1994:14–8

3. Hu C. Low-voltage CMOS device scaling. In: ISSCC Technical Papers, 1994;86–7

4. Voldman S et al. Scaling, optimization, and design considerations of electrostatic discharge protection circuits in CMOS technology. In: EOS/ESD Symposium Proceedings, 1993;251–60

5. Lin D. ESD sensitivity and VSLI technology trends: thermal breakdown and dielectric breakdown. In: EOS/ESD Symposium Proceedings, 1993;73–82

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