Storage requirements in ATM switching elements with correlated arrivals and independent uniform routing

Author:

Bruneel Herwig,Steyaert Bart

Publisher

Elsevier BV

Subject

Computer Networks and Communications,Hardware and Architecture,Modelling and Simulation,Software

Reference18 articles.

1. Input versus output queueing on a space-division packet switch;Karol;IEEE Trans. Comm.,1987

2. Analysis of telecommunications switch model (Geo/D/1) with time priorities;Schormans;Electron. Lett.,1990

3. Tail distributions of queue length and delay in discrete-time multiserver queueing models, applicable in ATM networks;Desmet,1991

4. Buffer requirements for ATM switches with multiserver output queues;Bruneel;Electron. Lett.,1991

5. Queueing models applying to a class of ATM multiplexers;Guerrero,1991

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Class clustering destroys delay differentiation in priority queues;European Journal of Operational Research;2014-05

2. On the evolution of traffic characteristics inside multistage switching systems;AEU - International Journal of Electronics and Communications;2009-05

3. Bound analysis for WRR scheduling in a statistical multiplexer with bursty sources;Telecommunication Systems;1999

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