Parallel algorithms development for programmable logic devices-Reference-Cited by-同舟云学术

Parallel algorithms development for programmable logic devices

Published:2006-09 Issue:9 Volume:37 Page:561-582
ISSN:0965-9978
Container-title:Advances in Engineering Software
language:en
Short-container-title:Advances in Engineering Software

Author:

Damaj Issam W.

Publisher

Elsevier BV

Subject

General Engineering,Software

Reference49 articles.

1. Parallel processing in a restructurable computer system;Estrin;IEEE Trans Electron Comput,1963

2. Xilinx. Information available from: http://www.xilinx.com.

3. Altera. Information available from: http://www.Altera.com.

4. Altium, Altium unveils new board-on-chip technology, Altium Limited Category: Press Releases: Industry News (Market). Available from: http://www.altium.com (April 2003).

5. Torkelsson K, Ditmar J. Header Compression in Handel-C An Internet Application and A New Design Language. In: Symposium on Digital Systems Design, Euromicro 2001. p. 2–7.

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