Subject
Electrical and Electronic Engineering,General Computer Science,Control and Systems Engineering
Reference22 articles.
1. Norton A., Silberger A. J. Parallelization and performance analysis of the Cooley-Tukey FFT algorithm for shared-memory architectures. IEEE Transaction on Computers1987;C-36(5):581–591
2. An algorithm for distributed computation of FFTs;Kirk;Computers and Electrical Engineering,1987
3. Sapiecha, K. and Jarocki, R., Modular architecture for high performance implementation of FFT algorithm. 13rd International Symposium on Computer Architecture, 261–70. Tokyo, 1986
4. VLSI design of an FFT processor network;McKinney;INTEGRATION, The VLSI Journal,1989
5. Shin, K. and Lee, M., A VLSI architecture for parallel computation of FFT. In Systolic Array Processors, ed. J. McCanny, J. McWhirter and E. E. Swartzlander Jr. Prentice Hall International, Hemel Hempstead, Hertfordshire, UK, 1989
Cited by
3 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Modulo 2n ± 1 Fused Add-Multiply Units;2015 IEEE Computer Society Annual Symposium on VLSI;2015-07
2. On the design of modulo 2n+1 dot product and generalized multiply–add units;Computers & Electrical Engineering;2013-02
3. Revisiting Sum of Residues Modular Multiplication;Journal of Electrical and Computer Engineering;2010