Evaluation and performance analysis of the process cache: a partitioned multi-process secondary cache
Author:
Publisher
Elsevier BV
Subject
Electrical and Electronic Engineering,General Computer Science,Control and Systems Engineering
Reference12 articles.
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3. McFarling, S. Program optimization for instruction caches. In: Proceedings of the Third International Conference on Architectural Support for Programming Languages and Operating Systems, 1989:183–191
4. Mogul JC, Borg A. The effect of context switches on cache performance. In: Proceedings of the Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 1991:75–84
5. Jouppi NP, Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers. In: Proceedings of the 17th Annual International Symposium on Computer Architecture, 1990:364–373
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