1. E. Beyne, The rise of the 3rd dimension for system intergration, in: Interconnect Technology Conference, 2006 International, IEEE, 2006, pp. 1–5.
2. S. Cheramy, J. Charbonnier, D. Henry, A. Astier, P. Chausse, M. Neyret, C. Brunet-Manquat, S. Verrun, N. Sillon, L. Bonnot, 3D integration process flow for set-top box application: description of technology and electrical results, in: Microelectronics and Packaging Conference, 2009. EMPC 2009. European, IEEE, 2009, pp. 1–6.
3. Unlocking the true potential of 3-D CPUs with microfluidic cooling;Serafy;IEEE Trans. Very Large Scale Integr. VLSI Syst.,2016
4. Thermal modeling, analysis, and management in VLSI circuits: Principles and methods;Pedram;Proc. IEEE,2006
5. On runtime communication-and thermal-aware application mapping in 3D NoC;Li,2017