1. “Accurate Estimation of Total Leakage Current in Scaled CMOS Logic Circuits Based on Compact Current Modeling” in;Mukhopadhyay;DAC,2003
2. Modeling and Analysis of Leakage Power Considering Within-Die Process Variations“ in;Shrivastava;ISLPED,2002
3. Static Power Consumption in Nano-Cmos Circuits: Physics and Modelling;Kuzmicz,2007
4. “Future of Nano CMOS Technology” in;Iwai;IEEE International Conference Electron Devices and Solid-State Circuits (EDSSC),2014
5. Transistor Design Challenges for Mobile and Digital Consumer Applications“ in 7th;Jeff;IEEE International Conference Solid-State and Integrated Circuits Technology,2004