A multiple-valued logic approach to the design and verification of hardware circuits-Reference-Cited by-同舟云学术

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A multiple-valued logic approach to the design and verification of hardware circuits

Published:2016-05 Issue: Volume:15 Page:69-93
ISSN:1570-8683
Container-title:Journal of Applied Logic
language:en
Short-container-title:Journal of Applied Logic

Author:

Rosenmann Amnon

Publisher

Elsevier BV

Subject

Applied Mathematics,Logic

Reference42 articles.

1. Discrete-Event System Simulation;Banks,2010

2. An Introduction to Many-Valued and Fuzzy Logic;Bergmann,2008

3. Scalable Hardware Verification with Symbolic Simulation;Bertacco,2006

4. Symbolic model checking without BDDs;Biere,1999

5. On a three-valued logical calculus and its application to the analysis of the paradoxes of the classical extended functional calculus;Bochvar;Hist. Philos. Logic,1981

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3. Matrix expression of finite Boolean-type algebras;Applied Mathematics and Computation;2021-04

4. Design of ternary logic inverter using quantum dot gate nonvolatile memory (QDNVM);2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS);2020-08

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