D3-Machine: A decoupled data-driven multithreaded architecture with variable resolution support

Author:

Evripidou Paraskevas

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Graphics and Computer-Aided Design,Computer Networks and Communications,Hardware and Architecture,Theoretical Computer Science,Software

Reference21 articles.

1. Mutlithreaded Computer Architecture a Summary of the State of the Art;Iannucci,1994

2. Panel Discussion, Architectural implementation issues for multithreading, in: R. Iannucci et al. (Eds.), Mutlithreaded Computer Architecture a Summary of the State of the Art, Kluwer Academic Publishers, Dordrecht, 1994

3. J. Dennis, G. Gao, Multithreaded architectures: principles, projects and issues, in: R. Iannucci et al. (Eds.), Mutlithreaded Computer Architecture a Summary of the State of the Art, Kluwer Academic Publishers, Dordrecht, 1994

4. P. Evripidou, J-L. Gaudiot, The USC decoupled multilevel data-flow execution model, in: Advanced Topics in Data-Flow Computing, Prentice-Hall, Englewood Cliffs, NJ, 1990

5. Arvind, K.P. Gostelow, The U-Interpreter, IEEE Computer (1982) 42–49

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1. Architectural Support for Data-Driven Execution;ACM Transactions on Architecture and Code Optimization;2015-01-09

2. Data-Driven Multithreading Using Conventional Microprocessors;IEEE Transactions on Parallel and Distributed Systems;2006-10

3. A Case for Chip Multiprocessors Based on the Data-Driven Multithreading Model;International Journal of Parallel Programming;2006-06

4. Hardware Budget and Runtime System for Data-Driven Multithreaded Chip Multiprocessor;Advances in Computer Systems Architecture;2006

5. DDM-CMP: Data-Driven Multithreading on a Chip Multiprocessor;Lecture Notes in Computer Science;2005

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