Interlock avoidance in transparent and dynamic parallel program instrumentation using logical clocks

Author:

Cai W.,Zhang K.,Turner S.J.,Sun C.

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Graphics and Computer-Aided Design,Computer Networks and Communications,Hardware and Architecture,Theoretical Computer Science,Software

Reference33 articles.

1. Visual programming and debugging for parallel computing;Browne;IEEE Parallel and Distributed Technology,1995

2. W. Cai, S.J. Turner, An algorithm for distributed discrete-event simulation – the carrier-null message approach, in: Proceedings of SCS Multiconference on Distributed Simulation, San Diego, USA, January 1990, pp. 3–8

3. W. Cai, S.J. Turner, Experimental studies of conservative distributed discrete-event simulation on transputer networks, in: S.J. Turner (Ed.), Tools and Techniques for Transputer Applications, IOS Press, 1990, pp. 138–147

4. W. Cai, Parallel program monitoring – the logical clock approach and its deadlock avoidance, Ph.D. Thesis, Dept. of Computer Science, University of Exeter, UK, 1991

5. Approach to the run-time monitoring of parallel programs;Cai;The Computer Journal,1994

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