State assignment and testability of PLA-based finite state machines-Reference-Cited by-同舟云学术

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State assignment and testability of PLA-based finite state machines

Published:1992-09 Issue:1-5 Volume:35 Page:391-398
ISSN:0165-6074
Container-title:Microprocessing and Microprogramming
language:en
Short-container-title:Microprocessing and Microprogramming

Author:

Buonanno Giacomo,Serra Micaela

Publisher

Elsevier BV

Subject

General Engineering

Reference22 articles.

1. A Logic Design Structure for LSI Testability;Eichelberger,1977

2. Automation in Design for Testability;Agrawal,1984

3. A Sequential Test Generation System;Mallela,1985

4. EBT: A Comprehensive Test Generatin System or Highly Sequential Circuits;Marlett,1978

5. Test Generation by Activation and Defect-Drive (TEGAD);Nitta;INTEGRATION J.,1985

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. VLSI common voting module for fault-tolerant TMR system in industrial system control applications;International Journal of Electronics;1994-02

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