1. MINT - a VHDL Simulation System;Altmae,1990
2. High-Level Synthesis and Simulation with VHDL;Berrojo,1991
3. VHDL as Input for High-Level Synthesis;Camposano,1991
4. Microprogramming Implementation of Timed Petri Nets;Kuchcinski;Integration, the VLSI Journal,1987
5. VHDL Synthesis Using Structured Modelling;Lis,1989