PROLOG as a formalism for VLSI design specification-Reference-Cited by-同舟云学术

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PROLOG as a formalism for VLSI design specification

Published:1989-01 Issue:1-5 Volume:25 Page:157-162
ISSN:0165-6074
Container-title:Microprocessing and Microprogramming
language:en
Short-container-title:Microprocessing and Microprogramming

Author:

Grabowiecki T.,Pawlak A.

Publisher

Elsevier BV

Subject

General Engineering

Reference11 articles.

1. VERIFY: A Program for Proving Correctness of Digital Hardware Designs;Barrow;Artificial Intelligence,1984

2. The use of PROLOG for executable specification and verification of easily testable design;Cabodi,1986

3. Programming in PROLOG;Clocksin,1981

4. Verification with PROLOG and temporal logic;Fujita,1983

5. Temporal logic based hardware description and its verification with PROLOG;Fujita;New Generation Computing,1983

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Prolog-based design environment for the high-level synthesis of application-specific architectures;Microprocessing and Microprogramming;1991-08

2. Formal hardware specification and verification using prolog;Microprocessing and Microprogramming;1989-08

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