Memory interference models for a multi-microprocessor system with a shared bus and a single external common memory-Reference-Cited by-同舟云学术

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Memory interference models for a multi-microprocessor system with a shared bus and a single external common memory

Published:1981-02 Issue:2 Volume:7 Page:124-133
ISSN:0165-6074
Container-title:Microprocessing and Microprogramming
language:en
Short-container-title:Microprocessing and Microprogramming

Author:

Ajmone Marsan M.,Gregoretti F.

Publisher

Elsevier BV

Subject

General Engineering

Reference14 articles.

1. Analysis of the instruction execution rate in certain computer structures;Strecker,1970

2. Analysis of memory interference in multiprocessors;Bhandarker;IEEE Transactions on Computers,1975

3. Interference in multiprocessor computer systems with interleaved memory;Baskett;Communications of the ACM,1976

4. A general model for memory interference in multiprocessors;Hoogendoorn;IEEE Transactions on Computers,1977

5. Interference in multiprocessor systems with localized memory access probabilities;Sethi;IEEE Transactions on Computers,1979

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. On the execution of parallel programs on multiprocessor systems—a queuing theory approach;Journal of the ACM;1990-04

2. Approximate analysis of memory contention in a multiprocessor system with a single bus;Electronics and Communications in Japan (Part I: Communications);1989-08

3. Analysis of common memory access contention with nonpreemptive priority oiscipline;Electronics and Communications in Japan (Part I: Communications);1986

4. Bus and memory interference in double bus multiprocessor systems;Microprocessing and Microprogramming;1984-02

5. Availability analysis of a N modules parallel system with common memory, central controller and distributed software;Microelectronics Reliability;1982-01

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