Performance analysis of a QoS capable cluster interconnect-Reference-Cited by-同舟云学术

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Performance analysis of a QoS capable cluster interconnect

Published:2005-05 Issue:1-4 Volume:60 Page:275-302
ISSN:0166-5316
Container-title:Performance Evaluation
language:en
Short-container-title:Performance Evaluation

Author:

Kim Eun Jung,Yum Ki Hwan,Das Chita R.

Publisher

Elsevier BV

Subject

Computer Networks and Communications,Hardware and Architecture,Modelling and Simulation,Software

Reference39 articles.

1. Scalable pipelined interconnect for distributed endpoint routing: the SGI SPIDER chip;Galles,1996

2. The Cray T3E network: adaptive routing in a high performance 3D torus;Scott,1996

3. Servernet II;Garcia,1997

4. Cavallino: the teraflops router and NIC;Carbonaro,1996

5. The SP2 high-performance switch;Stunkel;IBM Syst. J.,1995

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