Design and implementation of Performance Analysis Unit (PAU) for AXI-based multi-core System on Chip (SOC)-Reference-Cited by-同舟云学术

Design and implementation of Performance Analysis Unit (PAU) for AXI-based multi-core System on Chip (SOC)

Published:2010-03 Issue:2-4 Volume:34 Page:102-116
ISSN:0141-9331
Container-title:Microprocessors and Microsystems
language:en
Short-container-title:Microprocessors and Microsystems

Author:

Kyung Hyun-min,Park Gi-ho,Wook Kwak Jong,Kim Tae-jin,Park Sung-Bae

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference18 articles.

1. AMBA specification (Rev 2.0), ARM, 1999.

2. AMBA AXI Protocol Specification v1.0, ARM, 2003.

3. PrimeCell AXI Configurable Interconnect (PL300) Technical Reference Manual, ARM, 2004.

4. AMBA 3 High Performance Matrix (PL301) Technical Reference Manual r0p0, 2006.

5. G.H. Park, H.M. Kyung, J.B Im, et al., Architecture Exploration and Performance Verification Environments for Multi-core SOC for Mobile Multimedia Embedded Systems, WARFP, February, 2006.

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