Executing secured virtual machines within a manycore architecture-Reference-Cited by-同舟云学术

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Executing secured virtual machines within a manycore architecture

Published:2017-02 Issue: Volume:48 Page:21-35
ISSN:0141-9331
Container-title:Microprocessors and Microsystems
language:en
Short-container-title:Microprocessors and Microsystems

Author:

Dévigne Clément,Bréjon Jean-Baptiste,Meunier Quentin L.^ORCID,Wajsbürt Franck

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference37 articles.

1. LIP6, BULL, TSAR (Tera-Scale Architecture), (https://www-soc.lip6.fr/trac/tsar).

2. Extending amdahlś law for energy-efficient computing in the many-core era;Woo,2008

3. A generic architecture for on-chip packet-switched interconnections;Guerrier,2000

4. Networks on chips: a new soc paradigm;Benini;Computer,2002

5. A distributed run-time environment for the kalray mppa®-256 integrated manycore processor;de Dinechin;Procedia Comput. Sci.,2013

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. llhsc: A DeviceTree Syntax and Semantic Checker;2023 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W);2023-06

2. DSML4DT: A domain-specific modeling language for device tree software;Computers in Industry;2020-02

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