A framework for reliability-aware embedded system design on multiprocessor platforms-Reference-Cited by-同舟云学术

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A framework for reliability-aware embedded system design on multiprocessor platforms

Published:2014-08 Issue:6 Volume:38 Page:539-551
ISSN:0141-9331
Container-title:Microprocessors and Microsystems
language:en
Short-container-title:Microprocessors and Microsystems

Author:

Huang Jia,Barner Simon,Raabe Andreas,Buckl Christian,Knoll Alois

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference37 articles.

1. P. Axer, M. Sebastian, R. Ernst, Reliability analysis for MPSoCs with mixed-critical, hard real-time constraints, in: CODES+ISSS, 2011, pp. 149–158.

2. S. Barner, M. Geisinger, C. Buckl, A. Knoll, EasyLab: model-based development of software for mechatronic systems, in: IEEE/ASME International Conference on Mechatronic and Embedded Systems and Applications, Beijing, China, 2008, pp. 540–545.

3. Reliability of task graph schedules with transient and fail-stop failures: complexity and algorithms;Benoit;J. Sched.,2011

4. Reliability-driven system-level synthesis for mixed-critical embedded systems;Bolchini;IEEE Trans. Comput.,2013

5. Designing reliable systems from unreliable components: the challenges of transistor variability and degradation;Borkar;IEEE Micro,2005

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