Generic model implementation of deep neural network activation functions using GWO-optimized SCPWL model on FPGA-Reference-Cited by-同舟云学术

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Generic model implementation of deep neural network activation functions using GWO-optimized SCPWL model on FPGA

Published:2020-09 Issue: Volume:77 Page:103141
ISSN:0141-9331
Container-title:Microprocessors and Microsystems
language:en
Short-container-title:Microprocessors and Microsystems

Author:

Al-Rikabi Hussein M.H.,Al-Ja’afari Mohannad A.M.,Ali Ameer H.,Abdulwahed Saif H.

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference32 articles.

1. ReconÞgurable FPGA implementation of neural networks;Hajduk;Neurocomputing,2018

2. Automatic general-purpose neural hardware generator;Baptista;Neural Comput. Appl.,2017

3. Hardware implementation of evolvable block-based neural networks utilizing a cost efficient sigmoid-like activation function;Nambiar;Neurocomputing,2014

4. FPGA implementation of the multilayer neural network for the speed estimation of the two-mass drive system;Orlowska-Kowalska;IEEE Trans. Ind. Inf.,2011

5. Implementation of single artificial neuron using various activation functions and XOR gate on FPGA chip;Abrol,2015

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