Author:
K Bagyalakshmi,Karpagam M.
Subject
Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software
Reference22 articles.
1. Efficient approaches for designing reversible binary coded decimal adders;Biswas;Microelectronics journal,2008
2. Energy efficient hybrid adder architecture;Wimer;Integration,2015
3. A highly sensitive, low-power, and wide dynamic range CMOS digital pixel sensor;Hassanli;Sensors and Actuators A: Physical,2015
4. Real-time fault tolerant full adder design for critical applications;Kumar;Engineering science and technology, an international journal,2016
5. A comprehensive review on the VLSI design performance of different Parallel Prefix Adders;Rakesh;Materials Today: Proceedings,2019
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