Microprocessor and FPGA interfaces for in-system co-debugging in field programmable hybrid systems-Reference-Cited by-同舟云学术

Microprocessor and FPGA interfaces for in-system co-debugging in field programmable hybrid systems

Published:2005-04 Issue:2-3 Volume:29 Page:75-85
ISSN:0141-9331
Container-title:Microprocessors and Microsystems
language:en
Short-container-title:Microprocessors and Microsystems

Author:

Aguirre M.A.,Tombs J.N.,Baena-Lecuyer V.,Mora J.L.,Carrasco J.M.,Torralba A.,Franquelo L.G.

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference27 articles.

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2. M.A. Aguirre, J.N. Tombs, A. Torralba, L.G. Franquelo, Method for the functional test of large digital circuits using hardware emulators. International Patent Number: W ES-02/00571.

3. M.A. Aguirre, J.N. Tombs, A. Torralba, L.G. Franquelo, Procedure for the induction of register values in an emulated circuit using integrated hardware emulation, Patent Pending.

4. T.W. Albrecht, J. Notbauer, S. Rohringer, HW/SW coverification performance estimation and benchmark for a 24 embedded RISC core design. Proceedings of the Design Automation Conference, pp. 808–811. San Francisco June 1998.

5. AT94K Series Field Programmable System Level Integrated Circuits. Atmel June 2002.

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