BRAM-based function reuse for multi-core architectures in FPGAs-Reference-Cited by-同舟云学术

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BRAM-based function reuse for multi-core architectures in FPGAs

Published:2018-11 Issue: Volume:63 Page:237-248
ISSN:0141-9331
Container-title:Microprocessors and Microsystems
language:en
Short-container-title:Microprocessors and Microsystems

Author:

Becker Pedro H. Exenberger^ORCID,Sartor Anderson L.,Brandalero Marcelo^ORCID,Schneider Beck Antonio C.^ORCID

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference37 articles.

1. FPGA embedded processors;Fletcher,2005

2. Multiprocessor system-on-chip (MPSoC) technology;Wolf;IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.,2008

3. Adaptable embedded systems;Beck,2013

4. Measuring the gap between FPGAs and ASICs;Kuon;IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.,2007

5. OpenRISC 1200 IP Core Specification;Lampret,2001

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