Author:
Gu Zonghua,Liu Weichen,Xu Jiang,Cui Jin,He Xiuqiang,Deng Qingxu
Subject
Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software
Reference12 articles.
1. Xilinx Virtex-4 Family Overview. Preliminary Specification ds112, Tech. Rep., Xilinx Inc., January 2005.
2. A. Ahmadinia, C. Bobda, M. Bednara, J. Teich, A new approach for on-line placement on reconfigurable devices, in: IPDPS, 2004, pp. 134–140.
3. Fast template placement for reconfigurable computing systems;Bazargan;IEEE Design & Test of Computers,2000
4. C. Claus, F.H. Muller, J. Zeppenfeld, W. Stechele, A new framework to accelerate Virtex-II pro dynamic partial self-reconfiguration, in: Proceedings of the 14th Reconfigurable Architectures Workshop, 2007.
5. J. Cui, Q. Deng, X. He, Z. Gu, An efficient algorithm for online management of 2D area of partially reconfigurable FPGAs, in: R. Lauwereins, J. Madsen (Eds.), Design Automation and Test in Europe Conference and Exposition (DATE), ACM, 2007, pp. 129–134.
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