IMORC: An infrastructure and architecture template for implementing high-performance reconfigurable FPGA accelerators

Author:

Schumacher Tobias,Plessl Christian,Platzner Marco

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference35 articles.

1. XtremeData, Inc., Schaumburg, IL, USA, XD1000 Development System, 2008. .

2. A. Cantle, R. Bruce, An Introduction to the Nallatech Slipstream FSB-FPGA Accelerator Module for Intel Platforms and the Nallatech High-Level Toolset (NT 405-0342), Nallatech Ltd., Glasgow, UK, September 2007.

3. T. Schumacher, C. Plessl, M. Platzner, IMORC: application mapping, monitoring and optimization for high-performance reconfigurable computing, in: Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–278, doi:10.1109/FCCM.2009.25.

4. T. Schumacher, C. Plessl, M. Platzner, An accelerator for k-th nearest neighbor thinning based on the IMORC infrastructure, in: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2009, pp. 338–344.

5. Communication performance characterization for reconfigurable accelerator design on the XD1000;Schumacher,2009

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1. Heterogeneous Hardware Accelerators with Hybrid Interconnect: An Automated Design Approach;2015 International Conference on Advanced Computing and Applications (ACOMP);2015-11

2. Automated Hybrid Interconnect Design for FPGA Accelerators Using Data Communication Profiling;2014 IEEE International Parallel & Distributed Processing Symposium Workshops;2014-05

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