Power consumption of 3D networks-on-chips: Modeling and optimization
Author:
Publisher
Elsevier BV
Subject
Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software
Reference36 articles.
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1. EMSOA based application mapping framework for power optimisation in 3D-NoC;International Journal of Electronics;2022-12-20
2. On Error Injection for NoC Platforms: A UVM-Based Generic Verification Environment;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2020-05
3. KBMA: A knowledge‐based multi‐objective application mapping approach for 3D NoC;IET Computers & Digital Techniques;2019-03-20
4. A Self-Adaptive Mapping Approach for Network on Chip With Low Power Consumption;IEEE Access;2019
5. A power-optimized, area-efficient implementation of Connection-Then-Credit NoC physical layer;Microelectronics Journal;2017-10
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